cpu-arm-linux_test.cc 7.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232
  1. /* Copyright (c) 2018, Google Inc.
  2. *
  3. * Permission to use, copy, modify, and/or distribute this software for any
  4. * purpose with or without fee is hereby granted, provided that the above
  5. * copyright notice and this permission notice appear in all copies.
  6. *
  7. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  8. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  9. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  10. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  12. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  13. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
  14. #include "cpu-arm-linux.h"
  15. #include <string.h>
  16. #include <gtest/gtest.h>
  17. TEST(ARMLinuxTest, CPUInfo) {
  18. struct CPUInfoTest {
  19. const char *cpuinfo;
  20. unsigned long hwcap;
  21. unsigned long hwcap2;
  22. bool broken_neon;
  23. } kTests[] = {
  24. // https://crbug.com/341598#c33
  25. {
  26. "Processor: ARMv7 Processory rev 0 (v71)\n"
  27. "processor: 0\n"
  28. "BogoMIPS: 13.50\n"
  29. "\n"
  30. "Processor: 1\n"
  31. "BogoMIPS: 13.50\n"
  32. "\n"
  33. "Features: swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 "
  34. "idiva idivt\n"
  35. "CPU implementer : 0x51\n"
  36. "CPU architecture: 7\n"
  37. "CPU variant: 0x1\n"
  38. "CPU part: 0x04d\n"
  39. "CPU revision: 0\n"
  40. "\n"
  41. "Hardware: SAMSUNG M2\n"
  42. "Revision: 0010\n"
  43. "Serial: 00001e030000354e\n",
  44. HWCAP_NEON,
  45. 0,
  46. true,
  47. },
  48. // https://crbug.com/341598#c39
  49. {
  50. "Processor : ARMv7 Processor rev 0 (v7l)\n"
  51. "processor : 0\n"
  52. "BogoMIPS : 13.53\n"
  53. "\n"
  54. "Features : swp half thumb fastmult vfp edsp neon vfpv3 tls "
  55. "vfpv4\n"
  56. "CPU implementer : 0x51\n"
  57. "CPU architecture: 7\n"
  58. "CPU variant : 0x1\n"
  59. "CPU part : 0x04d\n"
  60. "CPU revision : 0\n"
  61. "\n"
  62. "Hardware : SAMSUNG M2_ATT\n"
  63. "Revision : 0010\n"
  64. "Serial : 0000df0c00004d4c\n",
  65. HWCAP_NEON,
  66. 0,
  67. true,
  68. },
  69. // Nexus 4 from https://crbug.com/341598#c43
  70. {
  71. "Processor : ARMv7 Processor rev 2 (v7l)\n"
  72. "processor : 0\n"
  73. "BogoMIPS : 13.53\n"
  74. "\n"
  75. "processor : 1\n"
  76. "BogoMIPS : 13.53\n"
  77. "\n"
  78. "processor : 2\n"
  79. "BogoMIPS : 13.53\n"
  80. "\n"
  81. "processor : 3\n"
  82. "BogoMIPS : 13.53\n"
  83. "\n"
  84. "Features : swp half thumb fastmult vfp edsp neon vfpv3 tls "
  85. "vfpv4 \n"
  86. "CPU implementer : 0x51\n"
  87. "CPU architecture: 7\n"
  88. "CPU variant : 0x0\n"
  89. "CPU part : 0x06f\n"
  90. "CPU revision : 2\n"
  91. "\n"
  92. "Hardware : QCT APQ8064 MAKO\n"
  93. "Revision : 000b\n"
  94. "Serial : 0000000000000000\n",
  95. HWCAP_NEON,
  96. 0,
  97. false,
  98. },
  99. // Razr M from https://crbug.com/341598#c43
  100. {
  101. "Processor : ARMv7 Processor rev 4 (v7l)\n"
  102. "processor : 0\n"
  103. "BogoMIPS : 13.53\n"
  104. "\n"
  105. "Features : swp half thumb fastmult vfp edsp neon vfpv3 tls "
  106. "vfpv4\n"
  107. "CPU implementer : 0x51\n"
  108. "CPU architecture: 7\n"
  109. "CPU variant : 0x1\n"
  110. "CPU part : 0x04d\n"
  111. "CPU revision : 4\n"
  112. "\n"
  113. "Hardware : msm8960dt\n"
  114. "Revision : 82a0\n"
  115. "Serial : 0001000201fe37a5\n",
  116. HWCAP_NEON,
  117. 0,
  118. false,
  119. },
  120. // Pixel 2 (truncated slightly)
  121. {
  122. "Processor : AArch64 Processor rev 1 (aarch64)\n"
  123. "processor : 0\n"
  124. "BogoMIPS : 38.00\n"
  125. "Features : fp asimd evtstrm aes pmull sha1 sha2 crc32\n"
  126. "CPU implementer : 0x51\n"
  127. "CPU architecture: 8\n"
  128. "CPU variant : 0xa\n"
  129. "CPU part : 0x801\n"
  130. "CPU revision : 4\n"
  131. "\n"
  132. "processor : 1\n"
  133. "BogoMIPS : 38.00\n"
  134. "Features : fp asimd evtstrm aes pmull sha1 sha2 crc32\n"
  135. "CPU implementer : 0x51\n"
  136. "CPU architecture: 8\n"
  137. "CPU variant : 0xa\n"
  138. "CPU part : 0x801\n"
  139. "CPU revision : 4\n"
  140. "\n"
  141. "processor : 2\n"
  142. "BogoMIPS : 38.00\n"
  143. "Features : fp asimd evtstrm aes pmull sha1 sha2 crc32\n"
  144. "CPU implementer : 0x51\n"
  145. "CPU architecture: 8\n"
  146. "CPU variant : 0xa\n"
  147. "CPU part : 0x801\n"
  148. "CPU revision : 4\n"
  149. "\n"
  150. "processor : 3\n"
  151. "BogoMIPS : 38.00\n"
  152. "Features : fp asimd evtstrm aes pmull sha1 sha2 crc32\n"
  153. "CPU implementer : 0x51\n"
  154. "CPU architecture: 8\n"
  155. "CPU variant : 0xa\n"
  156. "CPU part : 0x801\n"
  157. "CPU revision : 4\n"
  158. // (Extra processors omitted.)
  159. "\n"
  160. "Hardware : Qualcomm Technologies, Inc MSM8998\n",
  161. HWCAP_NEON, // CPU architecture 8 implies NEON.
  162. HWCAP2_AES | HWCAP2_PMULL | HWCAP2_SHA1 | HWCAP2_SHA2,
  163. false,
  164. },
  165. // Nexus 4 from
  166. // Garbage should be tolerated.
  167. {
  168. "Blah blah blah this is definitely an ARM CPU",
  169. 0,
  170. 0,
  171. false,
  172. },
  173. // A hypothetical ARMv8 CPU without crc32 (and thus no trailing space
  174. // after the last crypto entry).
  175. {
  176. "Features : aes pmull sha1 sha2\n"
  177. "CPU architecture: 8\n",
  178. HWCAP_NEON,
  179. HWCAP2_AES | HWCAP2_PMULL | HWCAP2_SHA1 | HWCAP2_SHA2,
  180. false,
  181. },
  182. // Various combinations of ARMv8 flags.
  183. {
  184. "Features : aes sha1 sha2\n"
  185. "CPU architecture: 8\n",
  186. HWCAP_NEON,
  187. HWCAP2_AES | HWCAP2_SHA1 | HWCAP2_SHA2,
  188. false,
  189. },
  190. {
  191. "Features : pmull sha2\n"
  192. "CPU architecture: 8\n",
  193. HWCAP_NEON,
  194. HWCAP2_PMULL | HWCAP2_SHA2,
  195. false,
  196. },
  197. {
  198. "Features : aes aes aes not_aes aes aes \n"
  199. "CPU architecture: 8\n",
  200. HWCAP_NEON,
  201. HWCAP2_AES,
  202. false,
  203. },
  204. {
  205. "Features : \n"
  206. "CPU architecture: 8\n",
  207. HWCAP_NEON,
  208. 0,
  209. false,
  210. },
  211. {
  212. "Features : nothing\n"
  213. "CPU architecture: 8\n",
  214. HWCAP_NEON,
  215. 0,
  216. false,
  217. },
  218. };
  219. for (const auto &t : kTests) {
  220. SCOPED_TRACE(t.cpuinfo);
  221. STRING_PIECE sp = {t.cpuinfo, strlen(t.cpuinfo)};
  222. EXPECT_EQ(t.hwcap, crypto_get_arm_hwcap_from_cpuinfo(&sp));
  223. EXPECT_EQ(t.hwcap2, crypto_get_arm_hwcap2_from_cpuinfo(&sp));
  224. EXPECT_EQ(t.broken_neon ? 1 : 0, crypto_cpuinfo_has_broken_neon(&sp));
  225. }
  226. }